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| Elektronische Bauelemente 3.5 A, 20V ,RDS(ON)75m[ -2.5 A, -20V ,RDS(ON)160m[ N And P-Channel Enhancement Mode Power Mos.FET SST3585 Description The SST3585 provide the designer with best combination of fast switching,low on-resistance and cost effectiveness. The SOT-26 package is universally used for all commercial-industrial surface mount applications. 0.30 0.55 0.95 Ref. SOT-26 0.37Ref. 0.20 0.60 Ref. 2.60 3.00 0.25 1.40 1.80 2.70 3.10 0~0.1 Features * RoHS Compliant * Low Gate Charge 0 o 10 o 1.20Ref. Dimensions in millimeters * Low On-resistance D1 6 S1 5 D2 4 D1 D2 Date Code 3585 G1 S1 G2 1 G1 2 S2 3 G2 S2 Absolute Maximum Ratings Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Continuous Drain Current Pulsed Drain Current 1 3 3 Symbol VDS VGS ID@TA=25 C ID@TA=70 C IDM PD@TA=25 o o Ratings 20 12 3.5 2.8 10 1.14 0.01 Unit -20 12 -2.5 -1.97 -10 V V A A A W W/ C o o T otal Power Dissipation Linear Derating Factor Operating Junction and Storage Temperature Range Tj, Tstg -55~+150 C Thermal Data Parameter Thermal Resistance Junction-ambient 3 Symbo Max. Rthj-a Ratings 110 o Unit C /W http://www.SeCoSGmbH.com/ Any changing of specification will not be informed individual 01-Jun-2002 Rev. A Page 1 of 7 Elektronische Bauelemente 3.5 A, 20V ,RDS(ON)75m[ -2.5 A, -20V ,RDS(ON)160m[ N And P-Channel Enhancement Mode Power Mos.FET SST3585 N-Channel Electrical Characteristics( Tj=25 C Unless otherwise specified) Parameter Drain-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Gate Threshold Voltage Gate-Source Leakage Current Drain-Source Leakage Current (Tj=25 C) Drain-Source Leakage Current (Tj=70 C) Static Drain-Source On-Resistance 2 o o o Symbol BVDSS BVDS/ Tj VGS(th) IGSS IDSS Min. 20 _ Typ. _ Max. _ _ Unit V V/ C V nA uA uA o Test Condition VGS=0V, ID=250uA Reference to 25 C, ID=-1mA VDS=VGS, ID=250uA VGS= 12V VDS=20V,VGS=0 VDS=16V,VGS=0 VGS=4.5V, ID=3.5A VGS=2.5V, ID=1.2A o 0.02 _ _ _ _ 0.5 _ _ _ _ 1.2 100 1 10 75 125 7 _ _ _ _ 4 0.7 2 6 8 10 3 230 RDS(ON) Qg Qgs Qgd Td(ON) Tr Td(Off) Tf Ciss Coss Crss Gfs Rg _ _ _ _ _ _ _ _ _ _ _ m[ Total Gate Charge 2 Gate-Source Charge Gate-Drain ("Miller") Charge Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Forward Transconductance Gate Resistance 2 nC ID=3A VDS=16V VGS=4.5V _ _ _ _ VDS=15V ID=1A nS VGS=5V RG=3.3[ RD=15 [ 370 _ _ 55 40 7 1.1 pF VGS=0V VDS=20V f=1.0MHz _ _ _ S [ VDS=5V, ID=3A f=1.0MHz 1.7 Source-Drain Diode Parameter Forward On Voltage 2 Symbol VDS Trr Qrr Min. _ Typ. _ 16 8 Max. 1.2 Unit V Test Condition IS=1.2A , VGS=0V. Is=3A, VGS=0V dl/dt=100A/us Reverse Recovery Time Reverse Recovery Charge _ _ _ _ nS nC Notes: 1.Pulse width limited by Max. junction temperature. 2.Pulse widthO 300us, dutycycleO2%. O 3.Surface mounted on 1 in2 copper pad of FR4 board; 1O5sec;180 C/W when mounted on Min. copper pad. http://www.SeCoSGmbH.com/ Any changing of specification will not be informed individual 01-Jun-2002 Rev. A Page 2 of 7 Elektronische Bauelemente 3.5 A, 20V ,RDS(ON)75m[ -2.5 A, -20V ,RDS(ON)160m[ N And P-Channel Enhancement Mode Power Mos.FET o SST3585 P-Channel Electrical Characteristics( Tj=25 C Unless otherwise specified) Parameter Drain-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Gate Threshold Voltage Gate-Source Leakage Current Drain-Source Leakage Current (Tj=25oC) Drain-Source Leakage Current (Tj=70 C ) o Symbol BVDSS BVDS/ Tj VGS(th) IGSS IDSS Min. - 20 _ _ _ _ _ _ Typ. _ Max. _ _ Unit V V/ oC V nA uA uA Test Condition VGS=0V, ID=-250uA Reference to 25oC ,ID=-1mA VDS=VGS, ID=-250uA VGS=12 V VDS=-20V,VGS=0 VDS=-16V,VGS=0 VGS=-10V, ID=-2.8A -0.01 _ _ _ _ -1.2 100 -1 -25 120 160 300 8 _ _ _ _ _ _ 430 _ _ _ _ _ 5 1 2 6 17 16 5 270 70 55 4 Static Drain-Source On-Resistance 2 RDS(ON) _ _ m[ VGS=-4.5V, ID=-2.5A VGS=-2.5V, ID=-2A Total Gate Charge 2 Gate-Source Charge Gate-Drain ("Miller") Charge Turn-on Delay Time2 Rise Time Turn-off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Forward Transconductance Qg Qgs Qgd Td(ON) Tr Td(Off) Tf Ciss Coss Crss Gfs _ _ _ _ _ _ _ _ _ _ nC ID=-2A VDS=-16V VGS=-4.5V VDS=-10V ID=-1A nS VGS=-10V RG=3.3[ RD=10 [ pF VGS=0V VDS=-20V f=1.0MHz _ _ S VDS=-5V, ID=-2A Source-Drain Diode Parameter Forward On Voltage 2 Reverse Recovery Time 2 Reverse Recovery Charge Symbol VDS Trr Qrr Min. _ Typ. _ Max. -1.2 Unit V Test Condition IS=-1.2A,VGS=0V. Is=-2A, V GS=0V dl/dt=100A/uS _ _ 20 15 _ _ nS nC Notes: 1.Pulse width limited by Max. junction temperature. 2.Pulse widthO 300us, dutycycleO2%. O 3.Surface mounted on 1 in2 copper pad of FR4 board; 1O5sec;180 C/W when mounted on Min. copper pad. h ttp://www.SeCoSGmbH.com/ Any changing of specification will not be informed individual 01-Jun-2002 Rev. A Page 3 of 7 Elektronische Bauelemente 3.5 A, 20V ,RDS(ON)75m[ -2.5 A, -20V ,RDS(ON)160m[ N And P-Channel Enhancement Mode Power Mos.FET SST3585 Characteristics Curve N-Channel Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics Fig 3. On-Resistance v.s. Gate Voltage Fig 4. Normalized On-Resistance v.s. Junction Temperature Fig 5. Forward Characteristics of Reverse Diode http://www.SeCoSGmbH.com/ Fig 6. Gate Threshold Voltage v.s. Junction Temperature Any changing of specification will not be informed individual 01-Jun-2002 Rev. A Page 4 of 7 Elektronische Bauelemente 3.5 A, 20V ,RDS(ON)75m[ -2.5 A, -20V ,RDS(ON)160m[ N And P-Channel Enhancement Mode Power Mos.FET SST3585 N-Channel Fig 7. Gate Charge Characteristics Fig 8. Typical Capacitance Characteristics 180 /W Fig 9. Maximum Safe Operating Area Fig 10. Effective Transient Thermal Impedance Fig 11. Transfer Characteristics http://www.SeCoSGmbH.com/ Fig 12. Gate Charge Waveform Any changing of specification will not be informed individual 01-Jun-2002 Rev. A Page 5 of 7 Elektronische Bauelemente 3.5 A, 20V ,RDS(ON)75m[ -2.5 A, -20V ,RDS(ON)160m[ N And P-Channel Enhancement Mode Power Mos.FET SST3585 P-Channel Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics Fig 3. On-Resistance v.s. Gate Voltage Fig 4. Normalized On-Resistance v.s. Junction Temperature Fig 5. Forward Characteristics of Reverse Diode http://www.SeCoSGmbH.com/ Fig 6. Gate Threshold Voltage v.s. Junction Temperature Any changing of specification will not be informed individual 01-Jun-2002 Rev. A Page 6 of 7 Elektronische Bauelemente 3.5 A, 20V ,RDS(ON)75m[ -2.5 A, -20V ,RDS(ON)160m[ N And P-Channel Enhancement Mode Power Mos.FET SST3585 P-Channe l Fig 7. Gate Charge Characteristics Fig 8. Typical Capacitance Characteristics 180 /W Fig 9. Maximum Safe Operating Area Fig 10. Effective Transient Thermal Impedance Fig 11. Switching Time Waveform http://www.SeCoSGmbH.com/ Fig 12. Gate Charge Waveform Any changing of specification will not be informed individual 01-Jun-2002 Rev. A Page 7 of 7 |
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